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www.nortonkit.com 18 अक्तूबर 2013
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Direct Links to Other Digital Pages:
Combinational Logic: [Basic Gates] [Derived Gates] [The XOR Function] [Binary Addition] [Negative Numbers and Binary Subtraction] [Multiplexer] [Decoder/Demultiplexer] [Boolean Algebra]
Sequential Logic: [RS NAND Latch] [RS NOR Latch] [Clocked RS Latch] [RS Flip-Flop] [JK Flip-Flop] [D Latch] [D Flip-Flop] [Flip-Flop Symbols] [Converting Flip-Flop Inputs]
Alternate Flip-Flop Circuits: [D Flip-Flop Using NOR Latches] [CMOS Flip-Flop Construction]
Counters: [Basic 4-Bit Counter] [Synchronous Binary Counter] [Synchronous Decimal Counter] [Frequency Dividers] [Counting in Reverse] [The Johnson Counter]
Registers: [Shift Register (S to P)] [Shift Register (P to S)]
The 555 Timer: [555 Internals and Basic Operation] [555 Application: Pulse Sequencer]
CMOS Flip-Flop Construction

CMOS technology allows a very different approach to flip-flop design and construction. Instead of using logic gates to connect the clock signal to the master and slave sections of the flip-flop, a CMOS flip-flop uses transmission gates to control the data connections. (See the CMOS gate electronics page for a closer look at the transmission gate itself.)

The result is that a controllable flip-flop can be built with only inverters and transmission gates — a very small and simple structure for an IC.

The basic CMOS D flip-flop is shown below.






Edge-triggered D NAND flip-flop



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